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1. Introduction

Each layout consists of several, mostly independent, objects. This chapter gives an overview of the object types and their relationship to each other. For a complete description of how to use Pcb, refer to 2. Getting Started. The layout is generated on-screen on a grid that can have its origin at any desired location. The X coordinate increases to the right, Y increases down to the bottom. All distances and sizes in Pcb are measured in mils (0.001 inch). One unit on the coordinate display is one mil in distance on the board. The grid may be set on a metric pitch, but is only correct to within the nearest +/- 1 mil. The sections in this chapter are sorted by the order of appearance of the objects within a layout file.

1.1 Symbols  Information about fonts and symbols.
1.2 Vias  Vias and pins connect layers.
1.3 Elements  Element, the basic type of circuits.
1.4 Layers  A `container' for lines, text...
1.5 Lines  Tracks on the board
1.6 Arcs  Curved tracks
1.7 Polygons  Planes and such
1.8 Text  Objects to add symbols to your board.
1.9 Nets  Describes the desired connections on the board.


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1.1 Symbols

The top object is the layout itself. It uses a set of symbols that resides at the first logical level. Each symbol is uniquely identified by a seven bit ASCII code. All layout objects share the same set of symbols. These symbols are used to form text objects on the silkscreen and copper layers. Undefined symbols are drawn as filled rectangles.

Every font file is preprocessed by a user-defined command when it is loaded. For details see `fontCommand', 5.1 Non-Standard X11 Application Resources.


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1.2 Vias

Vias provide through-hole connectivity across all layers. While vias look a lot like element pins, don't use vias for adding elements to the layout, even if that seems easier than creating a new element. The default solder-mask will cover over vias, so you won't be able to solder to them. Of course, you can change this so that vias also have solder-mask cut-outs, but it is not the default. Vias are also useful for defining arbitrary drill points such as those used for mounting a board. Vias used in this way have a special flag set so that they have no annular copper ring, and also appear in the unplated drill file. Ctrl-H key over a via switches it between being a pure-mounting hole and a regular via. You can assign a name to a via, which is useful during the creation of new element definitions. Each via exists on all copper layers. (i.e. blind and buried vias are not supported)


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1.3 Elements

Elements represent the components on a board. Elements are loaded from ASCII coded files in a similar manner to the layout file itself, or from the library selector window. An element is composed of lines and arcs on the silk-screen layer (used to define the package outline), pins (or pads for SMD) and three labels that define the description, the element's layout-name (which also appears on the silk-screen layer) and its value. You can choose which of the names are displayed on the screen with the Screen menu; however, the silk screen in the printout will always show the layout-name. Element pins are contained on the first logical level and so reside on all layers, but the pads of surface-mount elements reside on only the component or solder layers. An element can have a mixture of pins, pads (on one or both sides), and mounting holes.

A mark is used to position the element with respect to the cross hair during pasting. The mark will lie on a grid point when the element is positioned. The mark is drawn as a small diamond shape, but is only visible when both the silk and pins/pads layers are visible. All parts of an element are treated as one unit, except for the name. It is not possible to delete a single pin or move only part of an element on the layout. You can resize separate pieces of an element, but doing so is usually a bad idea. You can move/rotate the element name independtly of the element it belongs to. When you move an element name, a line is draw from the cursor to the element mark so it is easy to tell which element the name belongs to.

Each pin and pad has two string identifiers, one is the "name" which is a functional description of the pin (e.g. "clock in") and the other is the "number" of the pin which is used to identify it in a netlist. The "number" is usually an interger, but it can be any string. You can edit the "name" of each pin of an element, but the "number" is imbedded in the element definition and is determined when the new element is first created. Pads are similar to lines on a layer but they must be oriented either vertically or horizontally. Pads can have either rounded or square ends. Pins can be round, square, or octagonal.

Elements are supported by several special layers: silk, pins/pads and far-side. The silk layer shows the package outline and also holds legend text and element names. The pins/pads layer is used to toggle whether the element's pins and pads are displayed. The far-side layer controls visibility of objects (silkscreen and pads) that are on the far (i.e. not currently viewed) side of the board.

Every element file is preprocessed by a user-defined command when the file is read. For details see `elementCommand', 5.1 Non-Standard X11 Application Resources. m4, the default value of `elementCommand', allows you to create libraries for package definitions that are shared by all elements. The old element libraries distributed with Pcb expect m4 or an equivalent to be the elementCommand. The new library scheme simply has each element stored in a self-contained file, so there is no need to learn m4 to add to the libraries.

Pcb can create a list of all connections from one (or all) elements to the others or a list of unconnected pins. It can also verify the layout connections against a netlist file. The element's `layout-name' is the name used to identify the element in a netlist file (see 6.5 Netlist File Format).

The old libraries, or very old (pre-1.6) layout files may have incorrect pin numbering since there was no concept of pin numbers when they were created. Pcb uses the order of appearance of the pin definitions in the layout or library file if it uses the old format, but there is no guarantee that it will be correct for these old objects.

Be aware that a few of the old library parts may still be incorrectly implemented regarding pin-numbering. All of the DIL (Dual- Inline-Pins) parts are correct and most of the others are too, but you should verify the pin numbering of any non-DIL part before using an old library part. (use the `generate object report' in the Info menu to see what Pcb thinks a pin's number is) All of the old library names begin with a ~, so you can easily identify them. The old libraries also may contain other sorts of errors, including incorrect pin spacing, silkscreen overlaping solder areas, etc. Check carefully any element in the old library before using it! As the new library grows, the old library will be paired down to at least remove all of the elements with errors, but this will take time.

You can make your own element definitions graphically now. Simply draw vias for the pins, lines on the solder and/or component layers for surface-mount pads (they must be either horizontal or vertical), and lines and arcs on the silkscreen layer for the silkscreen outline. You should name (N key) each via and copper line with the pin number. Once you are happy with the geometry, select everything that is to become part of the element, then choose `convert selection to element' from the Select menu. Afterwards you can make pin (or pad) one square if you like, and give the element its various names. You can also give the pins and pads their functional names. Note that the element mark corresponds to the position you click after choosing the conversion from the menu, so decide where the mark goes and make sure it falls on a grid point before you request the conversion. If the vias/lines are not named, then the pin numbering will correspond to the order in which they were placed.

When you create a new element, remember that silkscreen lines should never overlap the copper part of the pins or pads, as this can interfere with soldering. The silkscreen should identify the maximum extent of the element package so it is easy to see how close elements can be placed together.

If you want to make an element similar to an existing one, you can break an element into constituent pieces from the Buffer menu. Paste the pieces to the layout, make the necessary changes, then convert it back into an element. If the pin numbers haven't changed, there is no need to name each via/line as they are pre-named when the element was broken apart. When you create a new element, you can save it to a file in order to have easy access to it the next time you run Pcb.


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1.4 Layers

Every layout consists of several layers that can be used independently or treated as a group. Layer groups can be used to logically separate (and color-code) different traces (e.g. power and signal); however, all layers within a group reside on the same physical copper layer of a board, so using different layers within the same group won't provide electrical separation where they touch or overlap. For details, see `layerGroups', 5.1 Non-Standard X11 Application Resources. Each layer is drawn in a color defined in the resource file and identified by a name that you can change (for details see `layerColor', 5.1 Non-Standard X11 Application Resources.) Layers are really just containers for line, arc, polygon, and text objects. The component and solder layers contain SMD elements as well, but the file structure doesn't reflect that fact directly.

Each layer group represents a physical layer on the printed circuit board. If you want to make a four layer board, you'll need to have at least four layer groups. Connections between layer groups are established only through element pins and vias. The relationship between a specific layer and the board itself is configureable from the `Edit layer groups' option in the Settings menu. The layer groups corresponding to the physical layers: component-side and solder-side are always defined and you must map at least one logical layer to each, even if you plan to make a single-sided board. You are not obligated to put tracks on either of them. Surface mount elements always reside on either the component-side or the solder-side layer group. When you paste an element from the buffer, it will go onto whichever side of the board you are viewing. You can swap which side of the board you are viewing by pressing the Tab key, or by selecting `view solder side' from the Screen menu. The layer groups just have a name or number associated with them - where they are sandwiched in the board is left for you to tell the manufacturer.

The silkscreen layer is special because there are actually two silkscreen layers, one for the top (component) and one for the bottom (solder) side of the board. Which silk layer you draw on is determined by the side of the board that you are viewing. If you are viewing the component side, then drawing on the silk layer draws to the component-side silk layer.

The netlist layer is another special layer. It shows rat's-nest lines (i.e. guides that show how the netlist expects the element to interconnect). If you make this the active layer, you can use the Line tool to add entries into the netlist, or to delete connections from the netlist window. Except for these two purposes, you should not make the netlist layer the active layer. Usually there is no need to do this because a separate schematic package should be used to create the netlist. Pcb can automatically draw all of the rats from the netlist. In some cases you may want to make a small change without going to the trouble of modifying the schematic, which is why this fascility is provided.


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1.5 Lines

Lines are used to draw tracks on the pc board. When in the line mode, each Btn1 press establishes one end of a line. Once the second point is defined, the line is drawn and a new line started where the first one ended. You can abondon the new starting point in favor of another by pressing Ctrl-Btn1, or Btn3, but don't use Btn2. The undo function (U key or `undo last operation' from the Edit menu) will take you back point by point if you use it while in the line mode. If you drag the pointer out of the Layout area while drawing a line, the display will auto-scroll (assuming sufficient zoom for scrolling). To stop auto-scroll, simply pass the pointer over the panner control.

New lines can be restricted to 45 degree angles if desired. You can toggle this restriction on and off while creating lines by pressing the period key. If the 45 degree restriction is turned on, then the / (forward slash) key can be used to cylce through three different modes of 45 degree line creation. One mode just creates a single line forced to the nearest 45 degree vector. The next mode creates two lines from the start to end points such that the first line leaves the start point at a 90 degree vector, and the second line enters the end point on a 45 degree vector. The last mode creates two lines such that the first line leaves the start point on a 45 degree vector and arrives at the end point on a 90 degree vector. You can temporarily swap between the last two modes by holding the Shift key down.

It is simple to edit a line object by breaking it into pieces (insert point mode), moving an end point or the whole line (Arrow tool), or changing the layer it resides on (M key moves the line under the pointer to the active layer). In the case when two line segments meet at exactly the same point you can delete the intermediate point, otherwise the delete tool removes an entire line. Feel free to experiment since Pcb will allow you to undo and redo anything that materially affects your work. If you switch active layers in the midst of placing lines a via will automatically be placed, when necessary, in order to continue the connection.

If you draw a line inside a polygon, it will either plow through the polygon creating a clearance, or touch the polygon. This behavior is selectable in the Settings menu for new lines. To change the behavior of an existing line, hit the J key with the cross hair over the line. You can increase the size of the clearance with the K key. Shift-K will decrease the clearance.

Lines do not need to intersect the center of a pin, pad, via, or other line for Pcb to understand that they make electrical connection. If the connection is too tenuous, running the design rule checker will report that the connection may break if the line width shrinks slightly.


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1.6 Arcs

Pcb can handle arcs of any angular extent, but when you create an arc with the Arc tool, it will be a quarter circle (this means they always bend a right angle). Arcs are very similar to lines otherwise. They are created on the active layer and have the same thickness that new lines will have. The various clicks for creating lines work pretty much the same way for creating arcs. In order to make the arc curve in the desired direction, drag the mouse along the tangent line from the starting position towards the end position. If the grid is too coarse, it may not be possible to distinguish whether you've moved over then up, or up then over, so if you can't seem to make the arc go in the direction you want, try pressing the Shift key while drawing the arc. Decreasing the grid spacing may also help. Alternatively you can draw the wrong arc, then rotate and move it where you want. Like the Line tool, after an arc is drawn a new starting point is established at the end point.

Whenever a starting point is established by either the Line or Arc tools it will be retained if you switch directly between the tools (e.g. F2 key for Lines, F8 key for Arcs. Arcs can either touch or clear polygons just like lines do. Of course connection searches, undo and all the other features you'd expect work with arcs too.


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1.7 Polygons

Sometimes it's useful to fill large areas with solid copper. The way to do this is with polygons. Polygons can be created in either the polygon mode or the rectangle mode. In the polygon mode, you'll have to define each corner of the polygon with a mouse click (Btn1). When the last point is clicked exactly on top of the starting point, the polygon is finished. Since this can be hard to do, the Shift-P key will enter the final point for you, closing the polygon. If the 45 degree angle restriction is turned on and you try to close the polygon when it is not possible, you'll get a warning instead. If you haven't finished entering a polygon, but want to undo one (or more) of the points that you've already defined, use the undo command (U key).

With the rectangle tool, defining the two diagonally opposite corners is sufficient, but of course the resulting polygon is a rectangle. Like lines, a polygon can by edited by deleting, inserting and moving the points that define it. Pins and vias always clear through polygons without touching them when first positioned. You must add a thermal with the thermal tool in order to connect pins and vias to polygons. Thermals can be added and removed by clicking Btn1 with the thermal tool over the pin or via. The thermal tool always places a thermal to polygons on the active layer, so if the tool doesn't seem to work, it's probably because the polygon you want to touch is not on the active layer.

Pcb is capable of handling complex polygons, but using a number of simpler ones improves performance of the connection tracing code. You also must be careful not to create polygons that touch or overlap themselves. The fabricated board may not look the way you expect if you violate this principle. It is always ok to have two (or more) polygons touch or overlap each other, but not for points within the same polygon to do so.

The great advantage to this new polygon behavior is that simple or complex ground and/or power planes can be easily made with polygons and seen on the screen. If you don't want this auto-clearance behavior, or you load a layout created by an early version of Pcb, the old behavior (shorts to all piercing pins and vias) is available. A `ChangeSize' operation (S key) toggles a polygon between the new and old polygon/pin behavior.


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1.8 Text

Text objects should be used to label a layout or to put additional information on the board. Elements have their `layout-name' labels on the silk-screen layer. If you are making a board without a silkscreen, you can use copper text to label the elements, but you have to do this manually.

Text is always horizontal when first created, but the rotate mode can align it along 0, 90, 180 and 270 degree angles. Text on the far side of the board will automatically appear mirror-imaged.

Warning: TEXT OBJECTS ON A COPPER LAYER CREATE COPPER LINES BUT THEY ARE NOT SCANNED FOR CONNECTIONS OR TESTED FOR CREATING SHORTS VS. THE NETLIST. NEITHER ARE TEXT OBJECTS TESTED AGAINST ANY DESIGN RULES.


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1.9 Nets

Layout files also contain the netlist that describes how the elements are supposed to be interconnected. This list of connetions can be loaded from a netlist file (see 6.5 Netlist File Format), or entered by drawing rat-lines as described previously. Each net has a name and routing style associated with it. The net contains a list of all element layout-name names and pin numbers that should be connected to the net. Loading a netlist file will replace all existing nets with the ones from the file. The Netlist window provides an easy way to browse through the net list. You can display the rat's-nest by selecting `optimize rats-nest' from the Connects menu. If you move or rotate elements, the rat's-nest will automatically follow the movements, but they won't necessarily show the shortest paths until you optimize them again.


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