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mc4020_bitmask.h

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00001 /* -*- c++ -*- */
00002 /*
00003  * Copyright 2003 Free Software Foundation, Inc.
00004  * 
00005  * This file is part of GNU Radio
00006  * 
00007  * GNU Radio is free software; you can redistribute it and/or modify
00008  * it under the terms of the GNU General Public License as published by
00009  * the Free Software Foundation; either version 2, or (at your option)
00010  * any later version.
00011  * 
00012  * GNU Radio is distributed in the hope that it will be useful,
00013  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00014  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015  * GNU General Public License for more details.
00016  * 
00017  * You should have received a copy of the GNU General Public License
00018  * along with GNU Radio; see the file COPYING.  If not, write to
00019  * the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
00020  * Boston, MA 02111-1307, USA.
00021  */
00022 
00023 #ifndef _INCLUDED_MC4020_BITMASK_H_
00024 #define _INCLUDED_MC4020_BITMASK_H_
00025 
00026 // bitmask values for mc4020_config.bitmask
00027 
00028 #define MCC_CH0_EN               0x00000001     // enable channel 0 for input
00029 #define MCC_CH1_EN               0x00000002     
00030 #define MCC_CH2_EN               0x00000004
00031 #define MCC_CH3_EN               0x00000008
00032 #define MCC_CH0_5V               0x00000010     // ch0 range: +/- 5V
00033 #define MCC_CH0_1V               0x00000000     // ch0 range: +/- 1V
00034 #define MCC_CH1_5V               0x00000020     // ch1 range: +/- 5V
00035 #define MCC_CH1_1V               0x00000000     // ch1 range: +/- 1V
00036 #define MCC_CH2_5V               0x00000040     // ch2 range: +/- 5V
00037 #define MCC_CH2_1V               0x00000000     // ch2 range: +/- 1V
00038 #define MCC_CH3_5V               0x00000080     // ch3 range: +/- 5V
00039 #define MCC_CH3_1V               0x00000000     // ch3 range: +/- 1V
00040 // select input source
00041 #define MCC_ASRC_MASK            0x00000700
00042 #define MCC_ASRC_BNC             0x00000000     // BNC connector (normal)
00043 #define MCC_ASRC_CAL_AGND        0x00000100     // AGND
00044 #define MCC_ASRC_CAL_0_625       0x00000200     // 0.625 V ref
00045 #define MCC_ASRC_CAL_4_375       0x00000300     // 4.375 V ref
00046 #define MCC_ASRC_CAL_HDR         0x00000400     // calibration header (P2)
00047 // Trig/Ext Clk BNC threshold select
00048 #define MCC_EXT_BNC_THRESH_ZERO  0x00000800
00049 #define MCC_EXT_BNC_THRESH_2_5V  0x00000000
00050 // data acquistion base clock source
00051 #define MCC_CLK_MASK             0x00003000
00052 #define MCC_CLK_INTERNAL         0x00000000     // 40MHz internal clock
00053 #define MCC_CLK_EXT_BNC          0x00001000     // external BNC connector
00054 #define MCC_CLK_AD_START_TRIG_IN 0x00002000     // external A/D start trigger in pin
00055  
00056 #define MCC_ALL_1V              (MCC_CH0_1V | MCC_CH1_1V | MCC_CH2_1V | MCC_CH3_1V)
00057 #define MCC_ALL_5V              (MCC_CH0_5V | MCC_CH1_5V | MCC_CH2_5V | MCC_CH3_5V)
00058 
00059 #endif /* _INCLUDED_MC4020_BITMASK_H_ */

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